IIT Bombay

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Publications

Citations / H-Index

1758 Citations

21 h-index

1498 Citations

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Google Scholar

Co-author Network

Expertise

Electrical and Electronic Engineering

Personal Information

Dr Udayan Ganguly

Male

Indian Institute of Technology Bombay, Powai

Mumbai Suburban, Maharashtra, India - 400076

Experience

Qualification

Patents

N-TYPE METAL-INTERFACIAL SEMICONDUCTOR LAYER-SEMICONDUCTOR (MISS)

METHOD OF SIMULTANEOUSLY FORMING LOW RESISTANCE METAL CONTACTS SIMULTANEOUSLY ON N AND P-TYPE SEMICONDUCTORS

SELECTOR DEVICE FOR BIPOLAR RRAM

LOW RESISTANCE METAL-INTERFACIAL LAYERSEMICONDUCTOR (MIS) CONTACT AND METHOD OF FORMING THEREOF

DISPOSITIF DE SÉLECTION POUR MÉMOIRE RRAM BIPOLAIRE | SELECTOR DEVICE FOR BIPOLAR RRAM

DISPOSITIF DE SÉLECTION POUR MÉMOIRE RRAM BIPOLAIRE | SELECTOR DEVICE FOR BIPOLAR RRAM

METHOD FOR FABRICATING GERMANIUM/SILICON ON INSULATOR IN RADIO FREQUENCY SPUTTER SYSTEM

PROCÉDÉ DE FABRICATION DE GERMANIUM/SILICIUM SUR ISOLANT DANS UN SYSTÈME DE PULVÉRISATION RADIOFRÉQUENCE | METHOD FOR FABRICATING GERMANIUM/SILICON ON INSULATOR IN RADIO FREQUENCY SPUTTER SYSTEM

PROCÉDÉ DE FABRICATION DE GERMANIUM/SILICIUM SUR ISOLANT DANS UN SYSTÈME DE PULVÉRISATION RADIOFRÉQUENCE | METHOD FOR FABRICATING GERMANIUM/SILICON ON INSULATOR IN RADIO FREQUENCY SPUTTER SYSTEM

TRANSISTOR DESIGN FOR IMPROVED PERFORMANCE AND VARIABILITY AND METHOD OF FABRICATION THEREOF

AN AMBIPOLAR TWO TERMINAL SELECTION DEVICE.

AN ELECTRONIC DEVICE THAT MIMICS A BIOLOGICAL NEURON AND ITS FABRICATION

BULK PLANAR CAPACITOR-LESS DYNAMIC RANDOM ACCESS MEMORY (DRAM)

SELECTOR-LESS RESISTANCE RANDOM ACCESS MEMORY (RRAM)

METHOD AND SYSTEM FOR ONE TIME PROGRAMMABLE MEMORY FOR ENCRYPTION AND RECONFIGURABLE CIRCUITS

LEAKY INTEGRATE & FIRE (LIF) NEURON BASED ON FLOATING BODY EFFECT

SYSTEM AND METHOD FOR GENERATING RANDOM BIT STRING IN AN INTEGRATED CIRCUIT

SPIKING NEURAL NETWORK (SNN) FACILITATING READ AND WRITE OPERATIONS AND A METHOD THEREOF

METHOD FOR FABRICATING NEURON OSCILLATOR INCLUDING THERMAL INSULATING DEVICE

AN ULTRA ENERGY EFFICIENT NEURON ENABLED BY TUNNELING IN SUB-THRESHOLD REGIME ON A HIGHLY MANUFACTURABLE 32 NM SOI CMOS TECHNOLOGY

AN ELECTRONIC DEVICE THAT MIMICS A BIOLOGICAL NEURON AND ITS FABRICATION

SYSTÈME ET PROCÉDÉ DE GÉNÉRATION DE CHAÎNE DE BITS ALÉATOIRES DANS UN CIRCUIT INTÉGRÉ | SYSTEM AND METHOD FOR GENERATING RANDOM BIT STRING IN AN INTEGRATED CIRCUIT

SYSTÈME ET PROCÉDÉ DE GÉNÉRATION DE CHAÎNE DE BITS ALÉATOIRES DANS UN CIRCUIT INTÉGRÉ | SYSTEM AND METHOD FOR GENERATING RANDOM BIT STRING IN AN INTEGRATED CIRCUIT

PROCÉDÉ DE FABRICATION D'UN OSCILLATEUR NEURONAL COMPRENANT UN DISPOSITIF D'ISOLATION THERMIQUE | METHOD FOR FABRICATING NEURON OSCILLATOR INCLUDING THERMAL INSULATING DEVICE

PROCÉDÉ DE FABRICATION D'UN OSCILLATEUR NEURONAL COMPRENANT UN DISPOSITIF D'ISOLATION THERMIQUE | METHOD FOR FABRICATING NEURON OSCILLATOR INCLUDING THERMAL INSULATING DEVICE

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Publications (196)

Academic Identity

Dr Udayan Ganguly

Publications

Citations / H-Index

Altmetrics

Google Scholar

Co-author Network

Co-author - 493

Expertise

Electrical and Electronic Engineering

Personal Information

Experience

Assistant Professor

Qualification

Ph.D

Patents

SELECTOR DEVICE FOR BIPOLAR RRAM

N-TYPE METAL-INTERFACIAL SEMICONDUCTOR LAYER-SEMICONDUCTOR (MISS)

METHOD OF SIMULTANEOUSLY FORMING LOW RESISTANCE METAL CONTACTS SIMULTANEOUSLY ON N AND P-TYPE SEMICONDUCTORS

SELECTOR DEVICE FOR BIPOLAR RRAM

LOW RESISTANCE METAL-INTERFACIAL LAYERSEMICONDUCTOR (MIS) CONTACT AND METHOD OF FORMING THEREOF

DISPOSITIF DE SÉLECTION POUR MÉMOIRE RRAM BIPOLAIRE | SELECTOR DEVICE FOR BIPOLAR RRAM

DISPOSITIF DE SÉLECTION POUR MÉMOIRE RRAM BIPOLAIRE | SELECTOR DEVICE FOR BIPOLAR RRAM

METHOD FOR FABRICATING GERMANIUM/SILICON ON INSULATOR IN RADIO FREQUENCY SPUTTER SYSTEM

PROCÉDÉ DE FABRICATION DE GERMANIUM/SILICIUM SUR ISOLANT DANS UN SYSTÈME DE PULVÉRISATION RADIOFRÉQUENCE | METHOD FOR FABRICATING GERMANIUM/SILICON ON INSULATOR IN RADIO FREQUENCY SPUTTER SYSTEM

PROCÉDÉ DE FABRICATION DE GERMANIUM/SILICIUM SUR ISOLANT DANS UN SYSTÈME DE PULVÉRISATION RADIOFRÉQUENCE | METHOD FOR FABRICATING GERMANIUM/SILICON ON INSULATOR IN RADIO FREQUENCY SPUTTER SYSTEM

TRANSISTOR DESIGN FOR IMPROVED PERFORMANCE AND VARIABILITY AND METHOD OF FABRICATION THEREOF

AN AMBIPOLAR TWO TERMINAL SELECTION DEVICE.

AN ELECTRONIC DEVICE THAT MIMICS A BIOLOGICAL NEURON AND ITS FABRICATION

BULK PLANAR CAPACITOR-LESS DYNAMIC RANDOM ACCESS MEMORY (DRAM)

SELECTOR-LESS RESISTANCE RANDOM ACCESS MEMORY (RRAM)

METHOD AND SYSTEM FOR ONE TIME PROGRAMMABLE MEMORY FOR ENCRYPTION AND RECONFIGURABLE CIRCUITS

LEAKY INTEGRATE & FIRE (LIF) NEURON BASED ON FLOATING BODY EFFECT

SYSTEM AND METHOD FOR GENERATING RANDOM BIT STRING IN AN INTEGRATED CIRCUIT

SPIKING NEURAL NETWORK (SNN) FACILITATING READ AND WRITE OPERATIONS AND A METHOD THEREOF

METHOD FOR FABRICATING NEURON OSCILLATOR INCLUDING THERMAL INSULATING DEVICE

AN ULTRA ENERGY EFFICIENT NEURON ENABLED BY TUNNELING IN SUB-THRESHOLD REGIME ON A HIGHLY MANUFACTURABLE 32 NM SOI CMOS TECHNOLOGY

AN ELECTRONIC DEVICE THAT MIMICS A BIOLOGICAL NEURON AND ITS FABRICATION

SYSTÈME ET PROCÉDÉ DE GÉNÉRATION DE CHAÎNE DE BITS ALÉATOIRES DANS UN CIRCUIT INTÉGRÉ | SYSTEM AND METHOD FOR GENERATING RANDOM BIT STRING IN AN INTEGRATED CIRCUIT

SYSTÈME ET PROCÉDÉ DE GÉNÉRATION DE CHAÎNE DE BITS ALÉATOIRES DANS UN CIRCUIT INTÉGRÉ | SYSTEM AND METHOD FOR GENERATING RANDOM BIT STRING IN AN INTEGRATED CIRCUIT

PROCÉDÉ DE FABRICATION D'UN OSCILLATEUR NEURONAL COMPRENANT UN DISPOSITIF D'ISOLATION THERMIQUE | METHOD FOR FABRICATING NEURON OSCILLATOR INCLUDING THERMAL INSULATING DEVICE